Semiconductor memory devices for storing data may be classified into volatile memory devices and non-volatile memory devices. The volatile memory devices are typically configured to store data by charging or discharging capacitors in memory cells, and widely used as main memories of various apparatuses. The volatile memory devices such as Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM) retain stored data while power is supplied and lose the stored data when power is off.
The non-volatile memory devices such as flash memory devices may maintain stored data even though power is off, and widely used for storing program codes and/or data in computers, mobile devices, etc.
According to demands for high memory capacity, high operation speed and low power consumption of the memory devices, new memory devices of various types have been developed to realize high integration rate of DRAM, high speed of SRAM and non-volatility of flash memory in a single memory device. For example, Phase Change Random Access Memory (PRAM) using phase change materials, Resistance Random Access Memory (RRAM) using materials having variable resistance such as transition-metal oxides, and Magnetic Random Access Memory (MRAM) using ferromagnetism materials are attracting attention as memory devices of next generation. Such materials have common characteristics that resistance thereof is variable depending on magnitude and/or direction of applied voltage and/or current, and that the resistance can be maintained (that is, non-volatility) even though the applied voltage and/or current is intercepted and thus refresh operation is not required.
Each memory cell of the resistive memory devices may be formed with one resistive element and one switching element so that data may be stored by controlling voltage and/or current of a bitline and a wordline to change resistance of the resistive element.
Since the semiconductor memory device cannot perform its own function if it includes a defective memory cell, detection and/or correction of defective memory cells is required to enhance yield of the semiconductor memory device.
As one solution, repairing methods may be adopted such that defective memory cells are replaced with redundancy memory cells through logical address mapping. Enhancement of yield is limited since the number of redundancy memory cells is restricted.
As another solution, error check and correction (ECC) function may be embodied in the semiconductor memory device. According to ECC function, data and related ECC code are written in a memory cell array. If errors occur in the ECC code while the data and the ECC code are written and/or read, ECC function itself may be in vain.